Modification of RISC-V softcore processor Orca.
REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection.
Run on ML605 evaluation board with UART 115200.
MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
Livre d'introduction à ROS
Build benchmark for RISC-V (default to RV64IMAC)
Tor based on ABE
network diagnostic tool using the UDP echo service (not ICMP echo because some vendors cheat and prioritize ICMP echo packets to show healthy connections)
Generate ROM with attacks for Rehad-Orca.
Sample and basic use of LaTeX beamer theme
3D model of the Gerard Bauzil experimental room.
This package is intended to ease construction of CORBA servers by templating actions that are common to all servers.