Explore projects
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Cache side channel attacks for RISC-V (also works for x86)
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Linux Module for : 1) R/W mmio registers. 2) Context change send info. 3) Interrupts handler.
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Ethernet MAC 10/100Mbps IP (OpenCores) with AXI4 (Lite) interface.
Has Linux driver support.
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Boot a 32-bit/64-bit RISC-V Linux!
With support for Matana kernel module.
For 32-bit target, the simulation with Spike or QEMU is broken, but works on real hardware. The Ethernet (opencores) support is for 32-bit only.
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Bootloader (@6000_0000) that receive file from UART and write to DDR (@8000_0000)
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MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
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Generate ROM with attacks for Rehad-Orca.
For synthesis, place mem.hex in ip/idram/src/input. [Request GCC cross compiler (RV32IM).] For bitsteam, replace BRAM content of myorca.bit. [Request Xilinx ISE setup and liscence.]Updated -
REHAD / Rehad-Orca
OtherModification of RISC-V softcore processor Orca.
REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection. Run on ML605 evaluation board with UART 115200.
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Florent Lamiraux / gerard-bauzil
BSD 2-Clause "Simplified" License3D model of the Gerard Bauzil experimental room.
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Clone of https://git.openrobots.org/projects/robotpkg-wip with branches prepared for the CI of other projects
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Clone of https://git.openrobots.org/projects/robotpkg with branches prepared for the CI of other projects
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Pierre Fernbach / hpp-doc
BSD Zero Clause LicenseUpdated -
Guilhem Saurel / hpp-template-corba
BSD 3-Clause "New" or "Revised" LicenseThis package is intended to ease construction of CORBA servers by templating actions that are common to all servers.
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Humanoid Path Planner / hpp-template-corba
BSD 3-Clause "New" or "Revised" LicenseThis package is intended to ease construction of CORBA servers by templating actions that are common to all servers.
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