MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
Bootloader (@6000_0000) that receive file from UART and write to DDR (@8000_0000)
Boot a 32-bit/64-bit RISC-V Linux!
With support for Matana kernel module.
For 32-bit target, the simulation with Spike or QEMU is broken, but works on real hardware. The Ethernet (opencores) support is for 32-bit only.
Ethernet MAC 10/100Mbps IP (OpenCores) with AXI4 (Lite) interface.
Has Linux driver support.
Linux Module for : 1) R/W mmio registers. 2) Context change send info. 3) Interrupts handler.
Try to adapt Mastik Toolkit to RISC-V
Cache side channel attacks for RISC-V (also works for x86)
This is the official Low Side Synchronous Buck converter Gitlab
Customized rddlsim version for my personal use
Build benchmark for RISC-V (default to RV64IMAC)
network diagnostic tool using the UDP echo service (not ICMP echo because some vendors cheat and prioritize ICMP echo packets to show healthy connections)
Resource-Constrained Scheduling Solver based on difference logic and clause learning
Code source of the Monte-Carlo Tree search, published at CP2021