Explore projects
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MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
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Bootloader (@6000_0000) that receive file from UART and write to DDR (@8000_0000)
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Boot a 32-bit/64-bit RISC-V Linux!
With support for Matana kernel module.
For 32-bit target, the simulation with Spike or QEMU is broken, but works on real hardware. The Ethernet (opencores) support is for 32-bit only.
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Ethernet MAC 10/100Mbps IP (OpenCores) with AXI4 (Lite) interface.
Has Linux driver support.
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Linux Module for : 1) R/W mmio registers. 2) Context change send info. 3) Interrupts handler.
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Cache side channel attacks for RISC-V (also works for x86)
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This is the official Low Side Synchronous Buck converter Gitlab
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Philippe Hérail / RDDLSim-Custom
Apache License 2.0Customized rddlsim version for my personal use
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Matthieu Herrb / echoc
BSD Zero Clause Licensenetwork diagnostic tool using the UDP echo service (not ICMP echo because some vendors cheat and prioritize ICMP echo packets to show healthy connections)
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Resource-Constrained Scheduling Solver based on difference logic and clause learning
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Gepetto / Articles
BSD 2-Clause "Simplified" LicenseUpdated -
Guilhem Saurel / Articles
BSD 2-Clause "Simplified" LicenseUpdated -
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Code source of the Monte-Carlo Tree search, published at CP2021
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