Explore projects
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OwnTech / Power API / OPALIB PID Current mode
GNU Lesser General Public License v2.1 onlyThe PID Current mode library for OwnTech Power API provides PID regulation for current mode.
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Paul Rouanet / ros2_control_bolt
Apache License 2.0Updated -
Luiz Fernando Lavado Villa / Core
GNU Lesser General Public License v2.1 onlyThe Core project is the main repository intended to be cloned by end-users.
It provides all the configuration required to begin a project with OwnTech Power API, and includes the ability to automatically download OwnTech libraries.
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This is the official Low Side Synchronous Buck converter Gitlab
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Clément Foucher / Core
GNU Lesser General Public License v2.1 onlyThe Core project is the main repository intended to be cloned by end-users.
It provides all the configuration required to begin a project with OwnTech Power API, and includes the ability to automatically download OwnTech libraries.
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OwnTech / Power API / Core
GNU Lesser General Public License v2.1 onlyThe Core project is the main repository intended to be cloned by end-users.
It provides all the configuration required to begin a project with OwnTech Power API, and includes the ability to automatically download OwnTech libraries.
Updated -
Gepetto / PythonQt
GNU Lesser General Public License v2.1 onlyCMake-ified version of PythonQt
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Cache side channel attacks for RISC-V (also works for x86)
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Fanny Risbourg / quadruped-reactive-walking
BSD 2-Clause "Simplified" LicenseUpdated -
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Linux Module for : 1) R/W mmio registers. 2) Context change send info. 3) Interrupts handler.
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Bootloader (@6000_0000) that receive file from UART and write to DDR (@8000_0000)
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Learning value function and warmstart policies.
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Tom Pillot / aseba
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Generate ROM with attacks for Rehad-Orca.
For synthesis, place mem.hex in ip/idram/src/input. [Request GCC cross compiler (RV32IM).] For bitsteam, replace BRAM content of myorca.bit. [Request Xilinx ISE setup and liscence.]Updated -
REHAD / Rehad-Orca
OtherModification of RISC-V softcore processor Orca.
REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection. Run on ML605 evaluation board with UART 115200.
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