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OwnTech
Power API
Core
Commits
f86ebf35
Commit
f86ebf35
authored
Feb 25, 2022
by
Clément Foucher
Browse files
Device tree reorganization.
New device tree organization, not based on Nucleo dts.
parent
e6796dbe
Changes
13
Hide whitespace changes
Inline
Side-by-side
zephyr/boards/arm/owntech_board/board.cmake
View file @
f86ebf35
...
...
@@ -4,5 +4,5 @@
# to allow board re-flashing (see PR #23230)
board_runner_args
(
pyocd
"--target=stm32g474rbtx"
)
include
(
${
ZEPHYR_BASE
}
/boards/common/pyocd.board.cmake
)
include
(
${
ZEPHYR_BASE
}
/boards/common/openocd.board.cmake
)
include
(
${
ZEPHYR_BASE
}
/boards/common/pyocd.board.cmake
)
zephyr/boards/arm/owntech_board/dts/adc-channels.dtsi
View file @
f86ebf35
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
mychannels: adc-inputs {
compatible = "adc-inputs";
...
...
@@ -68,13 +74,11 @@
};
/* Temperature channel */
/*
/*
temp-sensor {
io-channels = <&adc3 1>;
label = "TEMP_SENSOR";
};
*/
};*/
};
};
zephyr/boards/arm/owntech_board/dts/adc.dtsi
0 → 100644
View file @
f86ebf35
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
soc {
adc3: adc@50005000 {
compatible = "st,stm32-adc";
reg = < 0x50005000 0x100 >;
clocks = < &rcc STM32_CLOCK_BUS_AHB2 0x00002000 >;
interrupts = < 18 0x0 >;
status = "disabled";
label = "ADC_3";
#io-channel-cells = < 0x1 >;
};
};
};
\ No newline at end of file
zephyr/boards/arm/owntech_board/dts/bindings/can-standby-switch.yaml
0 → 100644
View file @
f86ebf35
description
:
CAN Standby Switch
compatible
:
"
can-standby-switch"
child-binding
:
description
:
CAN Stanby GPIO node
properties
:
can-standby-gpios
:
type
:
phandle-array
required
:
true
label
:
required
:
true
type
:
string
description
:
Human readable string describing the device (used as device_get_binding() argument)
zephyr/boards/arm/owntech_board/dts/can-standby-switch.dtsi
0 → 100644
View file @
f86ebf35
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
can-standby-switch {
compatible = "can-standby-switch";
label = "CAN_STANDBY";
can-standby-gpio-pin {
can-standby-gpios = <&gpiob 10 GPIO_ACTIVE_HIGH>;
label = "CAN Standby output";
};
};
};
\ No newline at end of file
zephyr/boards/arm/owntech_board/dts/hrtim.dtsi
View file @
f86ebf35
/ {
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
soc {
hrtim1: timers@40016800 {
compatible = "st,stm32-timers";
...
...
@@ -20,54 +26,5 @@
&hrtim1_chf1_pc6 &hrtim1_chf2_pc7>;
};
};
pinctrl: pin-controller@48000000 {
hrtim1_cha1_pa8: hrtim1_cha1_pa8 {
pinmux = <STM32_PINMUX('A', 8, AF13)>;
};
hrtim1_cha2_pa9: hrtim1_cha2_pa9 {
pinmux = <STM32_PINMUX('A', 9, AF13)>;
};
hrtim1_chb1_pa10: hrtim1_chb1_pa10 {
pinmux = <STM32_PINMUX('A', 10, AF13)>;
};
hrtim1_chb2_pa11: hrtim1_chb2_pa11 {
pinmux = <STM32_PINMUX('A', 11, AF13)>;
};
hrtim1_chc1_pb12: hrtim1_chc1_pb12 {
pinmux = <STM32_PINMUX('B', 12, AF13)>;
};
hrtim1_chc2_pb13: hrtim1_chc2_pb13 {
pinmux = <STM32_PINMUX('B', 13, AF13)>;
};
hrtim1_chd1_pb14: hrtim1_chd1_pb14 {
pinmux = <STM32_PINMUX('B', 14, AF13)>;
};
hrtim1_chd2_pb15: hrtim1_chd2_pb15 {
pinmux = <STM32_PINMUX('B', 15, AF13)>;
};
hrtim1_che1_pc8: hrtim1_che1_pc8 {
pinmux = <STM32_PINMUX('C', 8, AF3)>;
};
hrtim1_che2_pc9: hrtim1_che2_pc9 {
pinmux = <STM32_PINMUX('C', 9, AF3)>;
};
hrtim1_chf1_pc6: hrtim1_chf1_pc6 {
pinmux = <STM32_PINMUX('C', 6, AF13)>;
};
hrtim1_chf2_pc7: hrtim1_chf2_pc7 {
pinmux = <STM32_PINMUX('C', 7, AF13)>;
};
};
};
};
zephyr/boards/arm/owntech_board/dts/led.dtsi
0 → 100644
View file @
f86ebf35
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
leds {
compatible = "gpio-leds";
green_led: led_0 {
gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
label = "User LD2";
};
};
};
\ No newline at end of file
zephyr/boards/arm/owntech_board/dts/ngnd.dtsi
View file @
f86ebf35
/ {
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
ngnd: ngnd-switch {
compatible = "ngnd-switch";
label = "NGND";
...
...
zephyr/boards/arm/owntech_board/dts/pinctrl.dtsi
0 → 100644
View file @
f86ebf35
/*
* Copyright (c) 2022 OwnTech.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/ {
soc {
pinctrl: pin-controller@48000000 {
hrtim1_cha1_pa8: hrtim1_cha1_pa8 {
pinmux = <STM32_PINMUX('A', 8, AF13)>;
};
hrtim1_cha2_pa9: hrtim1_cha2_pa9 {
pinmux = <STM32_PINMUX('A', 9, AF13)>;
};
hrtim1_chb1_pa10: hrtim1_chb1_pa10 {
pinmux = <STM32_PINMUX('A', 10, AF13)>;
};
hrtim1_chb2_pa11: hrtim1_chb2_pa11 {
pinmux = <STM32_PINMUX('A', 11, AF13)>;
};
hrtim1_chc1_pb12: hrtim1_chc1_pb12 {
pinmux = <STM32_PINMUX('B', 12, AF13)>;
};
hrtim1_chc2_pb13: hrtim1_chc2_pb13 {
pinmux = <STM32_PINMUX('B', 13, AF13)>;
};
hrtim1_chd1_pb14: hrtim1_chd1_pb14 {
pinmux = <STM32_PINMUX('B', 14, AF13)>;
};
hrtim1_chd2_pb15: hrtim1_chd2_pb15 {
pinmux = <STM32_PINMUX('B', 15, AF13)>;
};
hrtim1_che1_pc8: hrtim1_che1_pc8 {
pinmux = <STM32_PINMUX('C', 8, AF3)>;
};
hrtim1_che2_pc9: hrtim1_che2_pc9 {
pinmux = <STM32_PINMUX('C', 9, AF3)>;
};
hrtim1_chf1_pc6: hrtim1_chf1_pc6 {
pinmux = <STM32_PINMUX('C', 6, AF13)>;
};
hrtim1_chf2_pc7: hrtim1_chf2_pc7 {
pinmux = <STM32_PINMUX('C', 7, AF13)>;
};
tim4_etr_pb3: tim4_etr_pb3 {
pinmux = <STM32_PINMUX('B', 3, AF2)>;
};
};
};
};
\ No newline at end of file
zephyr/boards/arm/owntech_board/dts/pinout.dtsi
deleted
100644 → 0
View file @
e6796dbe
/ {
soc {
pinctrl: pin-controller@48000000 {
tim4_etr_pb3: tim4_etr_pb3 {
pinmux = <STM32_PINMUX('B', 3, AF2)>;
};
};
};
};
\ No newline at end of file
zephyr/boards/arm/owntech_board/owntech_board.dts
View file @
f86ebf35
/*
*
The
first
part
of
this
file
is
based
on
Nucleo
G474RE
dts
original
file
.
*
All
changes
from
the
originl
file
are
indicated
with
comments
"Edited"
.
*
*
Copyright
(
c
)
2019
STMicroelectronics
.
*
Copyright
(
c
)
2022
OwnTech
.
*
*
SPDX
-
License
-
Identifier
:
Apache
-
2.
0
*
SPDX
-
License
-
Identifier
:
LGLPV
2
.
1
*/
/
dts
-
v1
/;
//
SOC
defintions
#
include
<
st
/
g4
/
stm32g474Xe
.
dtsi
>
#
include
<
st
/
g4
/
stm32g474r
(
b
-
c
-
e
)
tx
-
pinctrl
.
dtsi
>
//
Board
-
related
definitions
#
include
"dts/pinctrl.dtsi"
#
include
"dts/led.dtsi"
#
include
"dts/hrtim.dtsi"
#
include
"dts/adc.dtsi"
#
include
"dts/adc-channels.dtsi"
#
include
"dts/ngnd.dtsi"
#
include
"dts/can-standby-switch.dtsi"
/
{
//
Edited
for
OwnTech
Power
Converter
board
:
model
=
"OwnTech Power Converter board"
;
compatible
=
"owntech,owntech-board"
,
"st,stm32g474re-nucleo"
;
...
...
@@ -24,34 +32,8 @@
zephyr
,
can
-
primary
=
&
can1
;
};
leds
{
compatible
=
"gpio-leds"
;
green_led
:
led_0
{
gpios
=
<&
gpioa
5
GPIO_ACTIVE_HIGH
>;
label
=
"User LD2"
;
};
};
pwmleds
{
compatible
=
"pwm-leds"
;
green_pwm_led
:
green_pwm_led
{
pwms
=
<&
pwm2
1
4
PWM_POLARITY_NORMAL
>;
};
};
gpio_keys
{
compatible
=
"gpio-keys"
;
user_button
:
button
{
label
=
"User"
;
gpios
=
<&
gpioc
13
GPIO_ACTIVE_LOW
>;
};
};
aliases
{
led0
=
&
green_led
;
pwm
-
led0
=
&
green_pwm_led
;
sw0
=
&
user_button
;
};
};
...
...
@@ -78,54 +60,6 @@
apb2
-
prescaler
=
<
1
>;
};
//
Edited
for
OwnTech
Power
Converter
board
:
//
&
usart1_rx_pc5
conflict
with
&
adc2_in11_pc5
&
usart1
{
pinctrl
-
0
=
<&
usart1_tx_pc4
&
usart1_rx_pb7
>;
current
-
speed
=
<
115200
>;
status
=
"okay"
;
};
&
lpuart1
{
pinctrl
-
0
=
<&
lpuart1_tx_pa2
&
lpuart1_rx_pa3
>;
current
-
speed
=
<
115200
>;
status
=
"okay"
;
};
//
Edited
for
OwnTech
Power
Converter
board
:
//
&
i2c1_scl_pb8
&
i2c1_sda_pb9
will
conflict
with
can1
&
i2c1
{
status
=
"disabled"
;
};
//
Edited
for
OwnTech
Power
Converter
board
:
//
&
spi1_miso_pa6
&
spi1_mosi_pa7
conflict
with
&
adc2_in3_pa6
&
adc2_in4_pa7
&
spi1
{
status
=
"disabled"
;
};
//
Edited
for
OwnTech
Power
Converter
board
:
//
&
spi2_nss_pb12
conflict
with
$
fdcan2_rx_pb12
,
&
spi2_nss_pc6
AF
does
not
exist
&
spi2
{
status
=
"disabled"
;
};
//
Edited
for
OwnTech
Power
Converter
board
:
//
&
spi3_nss_pa15
&
spi3_miso_pc11
&
spi3_mosi_pc12
conflict
with
hrtim
&
spi3
{
pinctrl
-
0
=
<&
spi3_nss_pa4
&
spi3_sck_pc10
&
spi3_miso_pb4
&
spi3_mosi_pb5
>;
status
=
"okay"
;
};
&
timers2
{
status
=
"okay"
;
pwm2
:
pwm
{
status
=
"okay"
;
pinctrl
-
0
=
<&
tim2_ch1_pa5
>;
};
};
&
rtc
{
status
=
"okay"
;
};
...
...
@@ -156,39 +90,50 @@
status
=
"okay"
;
};
//
Edited
for
OwnTech
Power
Converter
board
&
adc1
{
pinctrl
-
0
=
<&
adc1_in6_pc0
&
adc1_in7_pc1
&
adc1_in8_pc2
&
adc1_in9_pc3
>;
/*****************/
/*
Communication
*/
/*****************/
//
UART
&
usart1
{
pinctrl
-
0
=
<&
usart1_tx_pb6
&
usart1_rx_pb7
>;
current
-
speed
=
<
115200
>;
status
=
"okay"
;
};
&
lpuart1
{
pinctrl
-
0
=
<&
lpuart1_tx_pa2
&
lpuart1_rx_pa3
>;
current
-
speed
=
<
115200
>;
status
=
"okay"
;
};
//
SPI
&
spi3
{
pinctrl
-
0
=
<&
spi3_nss_pa4
&
spi3_sck_pc10
&
spi3_miso_pb4
&
spi3_mosi_pb5
>;
status
=
"okay"
;
};
//
CAN
&
can1
{
pinctrl
-
0
=
<&
fdcan1_rx_p
a11
&
fdcan1_tx_p
a12
>;
bus
-
speed
=
<
125
000
>;
pinctrl
-
0
=
<&
fdcan1_rx_p
b8
&
fdcan1_tx_p
b9
>;
bus
-
speed
=
<
500
000
>;
sjw
=
<
1
>;
sample
-
point
=
<
875
>;
bus
-
speed
-
data
=
<
10
00000
>;
bus
-
speed
-
data
=
<
5
00000
>;
sjw
-
data
=
<
1
>;
sample
-
point
-
data
=
<
875
>;
status
=
"okay"
;
};
/*
*
The
following
part
is
addition
to
the
original
Nucleo
device
tree
file
.
*
*
Copyright
(
c
)
2022
OwnTech
.
*/
#
include
"dts/pinout.dtsi"
#
include
"dts/hrtim.dtsi"
#
include
"dts/adc-channels.dtsi"
#
include
"dts/ngnd.dtsi"
/*********/
/*
Timer
*/
/*********/
&
timers4
{
pinctrl
-
names
=
"incremental_encoder"
;
pinctrl
-
0
=
<&
tim4_etr_pb3
&
tim4_ch1_pb6
&
tim4_ch2_pb7
>;
status
=
"okay"
;
};
...
...
@@ -217,17 +162,20 @@
/*
ADC
*/
/*******/
&
adc1
{
pinctrl
-
0
=
<&
adc1_in6_pc0
&
adc1_in7_pc1
&
adc1_in8_pc2
&
adc1_in9_pc3
>;
status
=
"okay"
;
};
&
adc2
{
pinctrl
-
0
=
<&
adc2_in1_pa0
&
adc2_in2_pa1
&
adc2_in3_pa6
>;
status
=
"okay"
;
};
/*
&
adc3
{
pinctrl
-
0
=
<&
adc3_in1_pb1
>;
status
=
"okay"
;
};
*/
/*******/
/*
DAC
*/
...
...
zephyr/boards/arm/owntech_board/owntech_board.yaml
View file @
f86ebf35
...
...
@@ -9,14 +9,10 @@ toolchain:
ram
:
128
flash
:
512
supported
:
-
arduino_gpio
-
arduino_i2c
-
arduino_spi
-
nvs
-
pwm
-
i2c
-
gpio
-
usb device
-
counter
-
spi
-
watchdog
...
...
zephyr/prj.conf
View file @
f86ebf35
...
...
@@ -21,19 +21,12 @@ CONFIG_REBOOT=y
CONFIG_HWINFO
=
y
# Buses
CONFIG_GPIO
=
y
CONFIG_SERIAL
=
y
#CONFIG_SPI=y
# Console
CONFIG_CONSOLE_SUBSYS
=
y
CONFIG_CONSOLE_GETCHAR
=
y
CONFIG_STDOUT_CONSOLE
=
y
# Use minimal log by default to save memory for STM32F0 with little RAM
CONFIG_LOG
=
y
#CONFIG_LOG_MINIMAL=y
# Enable assertions for debug purpose
CONFIG_ASSERT
=
y
...
...
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