diff --git a/zephyr/modules/owntech_hardware_configuration/zephyr/public_api/HardwareConfiguration.cpp b/zephyr/modules/owntech_hardware_configuration/zephyr/public_api/HardwareConfiguration.cpp
index d322ec956649c7790c789d4e1f429d4899b5bd22..8163b68ee268676944bee85e3dc847b805635eb4 100644
--- a/zephyr/modules/owntech_hardware_configuration/zephyr/public_api/HardwareConfiguration.cpp
+++ b/zephyr/modules/owntech_hardware_configuration/zephyr/public_api/HardwareConfiguration.cpp
@@ -38,6 +38,9 @@
// Current class header
#include "HardwareConfiguration.h"
+// Include public header
+#include "hrtim.h"
+
/////
// Public object to interact with the class
@@ -60,10 +63,18 @@ HardwareConfiguration hwConfig;
*/
void HardwareConfiguration::setBoardVersion(hardware_version_t hardware_version)
{
- if (hardware_version == O2_v_1_1_2 || hardware_version == SPIN_v_0_9)
+ if (hardware_version == O2_v_1_1_2 || hardware_version == O2_v_0_9)
{
uart_lpuart1_swap_rx_tx();
+ hrtim_leg_tu(TIMA, TIMB);
+ }else if(hardware_version == SPIN_v_0_9){
+
+ uart_lpuart1_swap_rx_tx();
+ hrtim_leg_tu(TIMA, TIMC);
+ }else if(hardware_version == nucleo_G474RE){
+ hrtim_leg_tu(TIMA, TIMB);
}
+
}
diff --git a/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.cpp b/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.cpp
index 0d9de1973f78a3d08fcb116b497d1a6400008a2a..441332ab1254efe7c0a1f584b0f57d5f51cc44b1 100644
--- a/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.cpp
+++ b/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.cpp
@@ -27,7 +27,7 @@
// OwnTech Power API
#include "leg.h" // PWM management layer by inverter leg interface
-#include "hrtim.h"
+
// Current file header
#include "hrtim_configuration.h"
@@ -50,12 +50,27 @@ static uint16_t pwm_low_pulse_width;
static uint16_t pwm_high_pulse_width;
static bool full_bridge_bipolar_mode;
+static hrtim_tu_t leg1_tu;
+static hrtim_tu_t leg2_tu;
+
+
+/**
+ * This function initializes the timer managing each leg
+ */
+
+void hrtim_leg_tu(hrtim_tu_t tu1, hrtim_tu_t tu2)
+{
+ leg1_tu = tu1;
+ leg2_tu = tu2;
+}
+
+
/**
* This function initializes both legs in buck mode
*/
void hrtim_init_interleaved_buck_mode()
{
- hrtim_init_voltage_buck();
+ hrtim_init_voltage_buck(leg1_tu,leg2_tu);
pwm_period = leg_period();
pwm_phase_shift = pwm_period / 2;
@@ -68,7 +83,7 @@ void hrtim_init_interleaved_buck_mode()
*/
void hrtim_init_interleaved_buck_mode_center_aligned()
{
- hrtim_init_voltage_buck_center_aligned();
+ hrtim_init_voltage_buck_center_aligned(leg1_tu, leg2_tu);
pwm_period = leg_period();
pwm_phase_shift = pwm_period;
@@ -81,7 +96,7 @@ void hrtim_init_interleaved_buck_mode_center_aligned()
*/
void hrtim_init_interleaved_boost_mode()
{
- hrtim_init_voltage_boost();
+ hrtim_init_voltage_boost(leg1_tu, leg2_tu);
pwm_period = leg_period();
pwm_phase_shift = pwm_period / 2;
@@ -91,7 +106,7 @@ void hrtim_init_interleaved_boost_mode()
void hrtim_init_interleaved_boost_mode_center_aligned()
{
- hrtim_init_voltage_boost_center_aligned();
+ hrtim_init_voltage_boost_center_aligned(leg1_tu, leg2_tu);
pwm_period = leg_period();
pwm_phase_shift = pwm_period;
@@ -106,16 +121,16 @@ void hrtim_init_independent_mode(bool leg1_buck_mode, bool leg2_buck_mode)
{
// High resolution timer initialization
if (leg1_buck_mode && !leg2_buck_mode){
- hrtim_init_voltage_leg1_buck_leg2_boost();
+ hrtim_init_voltage_leg1_buck_leg2_boost(leg1_tu, leg2_tu);
}
else if (!leg1_buck_mode && leg2_buck_mode){
- hrtim_init_voltage_leg1_boost_leg2_buck();
+ hrtim_init_voltage_leg1_boost_leg2_buck(leg1_tu, leg2_tu);
}
else if (leg1_buck_mode && leg2_buck_mode){
- hrtim_init_voltage_buck();
+ hrtim_init_voltage_buck(leg1_tu, leg2_tu);
}
else if (!leg1_buck_mode && !leg2_buck_mode){
- hrtim_init_voltage_boost();
+ hrtim_init_voltage_boost(leg1_tu, leg2_tu);
}
pwm_period = leg_period();
@@ -133,16 +148,16 @@ void hrtim_init_independent_mode_center_aligned(bool leg1_buck_mode, bool leg2_b
{
// High resolution timer initialization
if (leg1_buck_mode && !leg2_buck_mode){
- hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned();
+ hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned(leg1_tu, leg2_tu);
}
else if (!leg1_buck_mode && leg2_buck_mode){
- hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned();
+ hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned(leg1_tu,leg2_tu);
}
else if (leg1_buck_mode && leg2_buck_mode){
- hrtim_init_voltage_buck_center_aligned();
+ hrtim_init_voltage_buck_center_aligned(leg1_tu, leg2_tu);
}
else if (!leg1_buck_mode && !leg2_buck_mode){
- hrtim_init_voltage_boost_center_aligned();
+ hrtim_init_voltage_boost_center_aligned(leg1_tu, leg2_tu);
}
pwm_period = leg_period();
@@ -156,7 +171,7 @@ void hrtim_init_independent_mode_center_aligned(bool leg1_buck_mode, bool leg2_b
*/
void hrtim_init_full_bridge_buck_mode()
{
- hrtim_init_voltage_buck();
+ hrtim_init_voltage_buck(leg1_tu, leg1_tu);
full_bridge_bipolar_mode = false; //left-aligned inverter is always on unipolar mode
pwm_period = leg_period();
@@ -172,7 +187,7 @@ void hrtim_init_full_bridge_buck_mode()
*/
void hrtim_init_full_bridge_buck_mode_center_aligned(bool bipolar_mode)
{
- hrtim_init_voltage_buck_center_aligned();
+ hrtim_init_voltage_buck_center_aligned(leg1_tu, leg2_tu);
full_bridge_bipolar_mode = bipolar_mode;
pwm_period = leg_period();
@@ -203,26 +218,26 @@ void hrtim_interleaved_pwm_update(float32_t pwm_duty_cycle)
{
pwm_duty_cycle = HIGH_DUTY;
pwm_pulse_width = pwm_high_pulse_width;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift);
}
else if (pwm_duty_cycle < LOW_DUTY) // SATURATION CONDITIONS TO AVOID DIVERGENCE.
{
pwm_duty_cycle = LOW_DUTY;
pwm_pulse_width = pwm_low_pulse_width;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift);
}
else
{
pwm_pulse_width = (pwm_duty_cycle * pwm_period);
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift);
}
- hrtim_update_adc_trig_interleaved( (pwm_pulse_width>>1) + (pwm_pulse_width>>2)); //works only on left aligned as center aligned does not use the same comparators
+ hrtim_update_adc_trig_interleaved( (pwm_pulse_width>>1) + (pwm_pulse_width>>2), leg1_tu, leg2_tu); //works only on left aligned as center aligned does not use the same comparators
}
/**
@@ -244,23 +259,23 @@ void hrtim_full_bridge_buck_pwm_update(float32_t pwm_duty_cycle)
pwm_duty_cycle = HIGH_DUTY;
pwm_pulse_width = pwm_high_pulse_width;
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
}
else if (pwm_duty_cycle < LOW_DUTY) // SATURATION CONDITIONS TO AVOID DIVERGENCE.
{
pwm_duty_cycle = LOW_DUTY;
pwm_pulse_width = pwm_low_pulse_width;
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
}
else
{
pwm_pulse_width = (pwm_duty_cycle * pwm_period);
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_period*pwm_duty_cycle);
}
}
else
@@ -270,23 +285,23 @@ void hrtim_full_bridge_buck_pwm_update(float32_t pwm_duty_cycle)
pwm_duty_cycle = HIGH_DUTY;
pwm_pulse_width = pwm_high_pulse_width;
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_phase_shift);
}
else if (pwm_duty_cycle < LOW_DUTY) // SATURATION CONDITIONS TO AVOID DIVERGENCE.
{
pwm_duty_cycle = LOW_DUTY;
pwm_pulse_width = pwm_low_pulse_width;
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_phase_shift);
}
else
{
pwm_pulse_width = (pwm_duty_cycle * pwm_period);
pwm_reverse_pulse_width = (1-pwm_duty_cycle) * pwm_period;
- leg_set(TIMA, pwm_pulse_width, 0);
- leg_set(TIMB, pwm_reverse_pulse_width, pwm_phase_shift);
+ leg_set(leg1_tu, pwm_pulse_width, 0);
+ leg_set(leg2_tu, pwm_reverse_pulse_width, pwm_phase_shift);
}
}
}
@@ -306,20 +321,20 @@ void hrtim_leg1_pwm_update(float32_t pwm_duty_cycle)
{
pwm_duty_cycle = HIGH_DUTY;
pwm_pulse_width = pwm_high_pulse_width;
- leg_set(TIMA, pwm_pulse_width, pwm_phase_shift_leg1);
+ leg_set(leg1_tu, pwm_pulse_width, pwm_phase_shift_leg1);
}
else if (pwm_duty_cycle < LOW_DUTY) // SATURATION CONDITIONS TO AVOID DIVERGENCE.
{
pwm_duty_cycle = LOW_DUTY;
pwm_pulse_width = pwm_low_pulse_width;
- leg_set(TIMA, pwm_pulse_width, pwm_phase_shift_leg1);
+ leg_set(leg1_tu, pwm_pulse_width, pwm_phase_shift_leg1);
}
else
{
pwm_pulse_width = (pwm_duty_cycle * pwm_period);
- leg_set(TIMA, pwm_pulse_width, pwm_phase_shift_leg1);
+ leg_set(leg1_tu, pwm_pulse_width, pwm_phase_shift_leg1);
}
}
@@ -337,20 +352,20 @@ void hrtim_leg2_pwm_update(float32_t pwm_duty_cycle)
{
pwm_duty_cycle = HIGH_DUTY;
pwm_pulse_width = pwm_high_pulse_width;
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift_leg2);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift_leg2);
}
else if (pwm_duty_cycle < LOW_DUTY) // SATURATION CONDITIONS TO AVOID DIVERGENCE.
{
pwm_duty_cycle = LOW_DUTY;
pwm_pulse_width = pwm_low_pulse_width;
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift_leg2);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift_leg2);
}
else
{
pwm_pulse_width = (pwm_duty_cycle * pwm_period);
- leg_set(TIMB, pwm_pulse_width, pwm_phase_shift_leg2);
+ leg_set(leg2_tu, pwm_pulse_width, pwm_phase_shift_leg2);
}
}
@@ -359,6 +374,8 @@ void hrtim_leg2_pwm_update(float32_t pwm_duty_cycle)
*/
void hrtim_leg1_phase_shift_update(float32_t phase_shift)
{
+ phase_shift = int(phase_shift)%360; // modulo
+ if(phase_shift<0) phase_shift = phase_shift + 360; // case of negative phase
pwm_phase_shift_leg1 = (uint16_t)(pwm_period * (phase_shift/360) );
}
@@ -368,6 +385,8 @@ void hrtim_leg1_phase_shift_update(float32_t phase_shift)
*/
void hrtim_leg2_phase_shift_update(float32_t phase_shift)
{
+ phase_shift = int(phase_shift)%360; // modulo
+ if(phase_shift<0) phase_shift = phase_shift + 360; // case of negative phase
pwm_phase_shift_leg2 = (uint16_t)(pwm_period * (phase_shift/360) );
}
@@ -377,6 +396,8 @@ void hrtim_leg2_phase_shift_update(float32_t phase_shift)
*/
void hrtim_leg1_phase_shift_update_center_aligned(float32_t phase_shift)
{
+ phase_shift = int(phase_shift)%360; // modulo
+ if(phase_shift<0) phase_shift = phase_shift + 360; // case of negative phase
pwm_phase_shift_leg1 = (uint16_t)(2*pwm_period * (phase_shift/360) );
}
@@ -387,6 +408,8 @@ void hrtim_leg1_phase_shift_update_center_aligned(float32_t phase_shift)
*/
void hrtim_leg2_phase_shift_update_center_aligned(float32_t phase_shift)
{
+ phase_shift = int(phase_shift)%360; // modulo
+ if(phase_shift<0) phase_shift = phase_shift + 360; // case of negative phase
pwm_phase_shift_leg2 = (uint16_t)(2*pwm_period * (phase_shift/360) );
}
@@ -397,8 +420,8 @@ void hrtim_leg2_phase_shift_update_center_aligned(float32_t phase_shift)
*/
void hrtim_stop_interleaved()
{
- leg_stop(TIMA);
- leg_stop(TIMB);
+ leg_stop(leg1_tu);
+ leg_stop(leg2_tu);
}
/**
@@ -407,8 +430,8 @@ void hrtim_stop_interleaved()
*/
void hrtim_stop_full_bridge_buck()
{
- leg_stop(TIMA);
- leg_stop(TIMB);
+ leg_stop(leg1_tu);
+ leg_stop(leg2_tu);
}
@@ -417,7 +440,7 @@ void hrtim_stop_full_bridge_buck()
*/
void hrtim_stop_leg1()
{
- leg_stop(TIMA);
+ leg_stop(leg1_tu);
}
/**
@@ -425,7 +448,7 @@ void hrtim_stop_leg1()
*/
void hrtim_stop_leg2()
{
- leg_stop(TIMB);
+ leg_stop(leg2_tu);
}
/**
* This stops the converter by putting both timing
@@ -433,8 +456,8 @@ void hrtim_stop_leg2()
*/
void hrtim_start_interleaved()
{
- leg_start(TIMA);
- leg_start(TIMB);
+ leg_start(leg1_tu);
+ leg_start(leg2_tu);
}
/**
@@ -443,8 +466,8 @@ void hrtim_start_interleaved()
*/
void hrtim_start_full_bridge_buck()
{
- leg_start(TIMA);
- leg_start(TIMB);
+ leg_start(leg1_tu);
+ leg_start(leg2_tu);
}
/**
@@ -453,7 +476,7 @@ void hrtim_start_full_bridge_buck()
*/
void hrtim_start_leg1()
{
- leg_start(TIMA);
+ leg_start(leg1_tu);
}
/**
* This stops the converter by putting both timing
@@ -461,12 +484,12 @@ void hrtim_start_leg1()
*/
void hrtim_start_leg2()
{
- leg_start(TIMB);
+ leg_start(leg2_tu);
}
void set_adc_trig_interleaved(uint16_t new_trig)
{
- hrtim_update_adc_trig_interleaved(new_trig);
+ hrtim_update_adc_trig_interleaved(new_trig, leg1_tu, leg2_tu);
}
@@ -476,12 +499,12 @@ void set_adc_trig_interleaved(uint16_t new_trig)
*/
void hrtim_set_dead_time_leg1(uint16_t rise_ns, uint16_t fall_ns)
{
- leg_set_dt(TIMA, rise_ns, fall_ns);
+ leg_set_dt(leg1_tu, rise_ns, fall_ns);
}
/**
* This updates the dead time of the leg 2
*/
void hrtim_set_dead_time_leg2(uint16_t rise_ns, uint16_t fall_ns)
{
- leg_set_dt(TIMB, rise_ns, fall_ns);
+ leg_set_dt(leg2_tu, rise_ns, fall_ns);
}
diff --git a/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.h b/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.h
index 88805c2fb6dc300001c374f1d42d54919ab14921..fdbc9568bcf81ed1b26f92edd5ab0963bd05f7bd 100644
--- a/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.h
+++ b/zephyr/modules/owntech_hardware_configuration/zephyr/src/hrtim_configuration.h
@@ -28,8 +28,18 @@
#include <arm_math.h>
+#include "hrtim.h"
+/**
+ * @brief This function initializes the timer managing the legs
+ *
+ * @param[in] tu1 timer unit for leg 1
+ * @param[in] tu2 timer unit for leg 2
+ */
+
+void hrtim_leg_tu(hrtim_tu_t tu1, hrtim_tu_t tu2);
+
/**
* @brief This function initializes the converter in interleaved buck mode
* with the input on the high side and the output on the low side
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/hrtim.h b/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/hrtim.h
index 18f45dbf0bc5d2f46e28e0fbe7ef3acfae6f3f73..da2872674bb2669ee835c15737bf8adabf88658a 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/hrtim.h
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/hrtim.h
@@ -82,15 +82,15 @@ void hrtim_pwm_set(hrtim_t dev, hrtim_tu_t tu, uint16_t value, uint16_t shift);
void hrtim_init_current();
-void hrtim_init_voltage_buck();
-void hrtim_init_voltage_buck_center_aligned();
-void hrtim_init_voltage_boost();
-void hrtim_init_voltage_boost_center_aligned();
-void hrtim_init_voltage_leg1_buck_leg2_boost();
-void hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned();
-void hrtim_init_voltage_leg1_boost_leg2_buck();
-void hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned();
-void hrtim_update_adc_trig_interleaved(uint16_t new_trig);
+void hrtim_init_voltage_buck(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_buck_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_boost(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_boost_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_leg1_buck_leg2_boost(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_leg1_boost_leg2_buck(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
+void hrtim_update_adc_trig_interleaved(uint16_t new_trig, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/leg.h b/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/leg.h
index f3978c52e6b5cef9a385d78f691f9816517ff1de..cf4cdadfd4ca0b9098862c1e78a406689dcbe6d5 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/leg.h
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/public_api/leg.h
@@ -68,7 +68,7 @@ typedef struct {
*
* @return HRTIM period
*/
-uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention);
+uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
/**
* @brief Initializes all the configured devices with up-down mode and the chosen switch convention
@@ -78,7 +78,7 @@ uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_conv
*
* @return HRTIM period
*/
-uint16_t leg_init_center_aligned(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention);
+uint16_t leg_init_center_aligned(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
/**
* @brief Set the PWM pulse width for a given leg device
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
index 74fd7ad5018ce09afb66c7680d52ebc18c4b9f0e..aeee3a17ef10bee76b16b7703dc10137e9d315a2 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
@@ -32,16 +32,22 @@
#include "leg.h"
-void _hrtim_init_events()
-{
+void _hrtim_init_events(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
+{
+ if(leg1_tu == TIMA && leg2_tu == TIMB){
hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMACMP3);
hrtim_adc_trigger_en(3, 2, LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4);
- hrtim_update_adc_trig_interleaved(1);
+ }else if(leg1_tu == TIMA && leg2_tu == TIMC){
+ hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMACMP3);
+ hrtim_adc_trigger_en(3, 3, LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4);
+ }
+
+ hrtim_update_adc_trig_interleaved(1, leg1_tu, leg2_tu);
}
-void _hrtim_init_events_center_aligned()
+void _hrtim_init_events_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
-
+ if(leg1_tu == TIMA && leg2_tu == TIMB){
// setting the adc roll-over mode on period event
LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_A, LL_HRTIM_ROLLOVER_MODE_PER);
LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_B, LL_HRTIM_ROLLOVER_MODE_PER);
@@ -49,12 +55,26 @@ void _hrtim_init_events_center_aligned()
// setting adc trigger
hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMAPER);
hrtim_adc_trigger_en(3, 2, LL_HRTIM_ADCTRIG_SRC13_TIMBPER);
+ }else if(leg1_tu == TIMA && leg2_tu == TIMC){
+ // setting the adc roll-over mode on period event
+ LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_A, LL_HRTIM_ROLLOVER_MODE_PER);
+ LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_C, LL_HRTIM_ROLLOVER_MODE_PER);
+
+ // setting adc trigger
+ hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMAPER);
+ hrtim_adc_trigger_en(3, 2, LL_HRTIM_ADCTRIG_SRC24_TIMCPER);
+ }
}
-void hrtim_update_adc_trig_interleaved(uint16_t new_trig)
+void hrtim_update_adc_trig_interleaved(uint16_t new_trig, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
+ if(leg1_tu == TIMA && leg2_tu == TIMB){
hrtim_cmp_set(0, TIMA, CMP3xR, new_trig);
hrtim_cmp_set(0, TIMB, CMP4xR, new_trig);
+ }else if(leg1_tu == TIMA && leg2_tu == TIMC){
+ hrtim_cmp_set(0, TIMA, CMP3xR, new_trig);
+ hrtim_cmp_set(0, TIMC, CMP4xR, new_trig);
+ }
}
@@ -65,50 +85,50 @@ void hrtim_init_current()
hrtim_cm_enable();
}
-void hrtim_init_voltage_buck()
+void hrtim_init_voltage_buck(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init(true,true);
- _hrtim_init_events();
+ leg_init(true,true, leg1_tu, leg2_tu);
+ _hrtim_init_events(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_buck_center_aligned()
+void hrtim_init_voltage_buck_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init_center_aligned(true,true);
- _hrtim_init_events_center_aligned();
+ leg_init_center_aligned(true,true, leg1_tu, leg2_tu);
+ _hrtim_init_events_center_aligned(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_boost()
+void hrtim_init_voltage_boost(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init(false,false);
- _hrtim_init_events();
+ leg_init(false,false, leg1_tu, leg2_tu);
+ _hrtim_init_events(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_boost_center_aligned()
+void hrtim_init_voltage_boost_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init_center_aligned(false,false);
- _hrtim_init_events_center_aligned();
+ leg_init_center_aligned(false,false, leg1_tu, leg2_tu);
+ _hrtim_init_events_center_aligned(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_leg1_buck_leg2_boost()
+void hrtim_init_voltage_leg1_buck_leg2_boost(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init(true,false);
- _hrtim_init_events();
+ leg_init(true,false, leg1_tu, leg2_tu);
+ _hrtim_init_events(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned()
+void hrtim_init_voltage_leg1_buck_leg2_boost_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init_center_aligned(true,false);
- _hrtim_init_events_center_aligned();
+ leg_init_center_aligned(true,false, leg1_tu, leg2_tu);
+ _hrtim_init_events_center_aligned(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_leg1_boost_leg2_buck()
+void hrtim_init_voltage_leg1_boost_leg2_buck(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init(false,true);
- _hrtim_init_events();
+ leg_init(false,true, leg1_tu, leg2_tu);
+ _hrtim_init_events(leg1_tu, leg2_tu);
}
-void hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned()
+void hrtim_init_voltage_leg1_boost_leg2_buck_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
- leg_init_center_aligned(false,true);
- _hrtim_init_events_center_aligned();
+ leg_init_center_aligned(false,true, leg1_tu, leg2_tu);
+ _hrtim_init_events_center_aligned(leg1_tu, leg2_tu);
}
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
index a50c04ae44cf5d965093d46e7a807be846432dd2..2e316e32cbb2c9a7a506c15d541becbd260e9981 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
@@ -163,26 +163,26 @@ static inline uint32_t _period_ckpsc(hrtim_t hrtim, uint32_t freq,
return frequency;
}
-uint16_t hrtim_init(hrtim_t hrtim, uint32_t *freq, uint16_t dead_time_ns, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention)
+uint16_t hrtim_init(hrtim_t hrtim, uint32_t *freq, uint16_t dead_time_ns, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
/* Master timer initialization */
uint16_t period = hrtim_init_master(hrtim, freq);
- /* Timer A initialization for leg 1 */
- hrtim_init_tu(hrtim, TIMA, freq, Lft_aligned);
- hrtim_pwm_dt(hrtim, TIMA, dead_time_ns, dead_time_ns); // Set the dead time. Note: this must be done before enable counter
- hrtim_cnt_en(hrtim, TIMA); // Enable counter
- hrtim_rst_evt_en(hrtim, TIMA, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer A with the master timer, with a reset on period event
+ /* Timer initialization for leg 1 */
+ hrtim_init_tu(hrtim, leg1_tu, freq, Lft_aligned);
+ hrtim_pwm_dt(hrtim, leg1_tu, dead_time_ns, dead_time_ns); // Set the dead time. Note: this must be done before enable counter
+ hrtim_cnt_en(hrtim, leg1_tu); // Enable counter
+ hrtim_rst_evt_en(hrtim, leg1_tu, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer A with the master timer, with a reset on period event
- /* Timer B initialization for leg 2 */
- hrtim_init_tu(hrtim, TIMB, freq, Lft_aligned);
- hrtim_pwm_dt(hrtim, TIMB, dead_time_ns, dead_time_ns); // Set the dead time. Note: this must be done before enable counter
- hrtim_cnt_en(hrtim, TIMB); // Enable the counter
- hrtim_rst_evt_en(hrtim, TIMB, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer B with the master timer, with a reset on period event
+ /* Timer initialization for leg 2 */
+ hrtim_init_tu(hrtim, leg2_tu, freq, Lft_aligned);
+ hrtim_pwm_dt(hrtim, leg2_tu, dead_time_ns, dead_time_ns); // Set the dead time. Note: this must be done before enable counter
+ hrtim_cnt_en(hrtim, leg2_tu); // Enable the counter
+ hrtim_rst_evt_en(hrtim, leg2_tu, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer B with the master timer, with a reset on period event
- hrtim_cmpl_pwm_out1(hrtim, TIMA, leg1_upper_switch_convention, Lft_aligned); // Set the convention for leg 1
- hrtim_cmpl_pwm_out1(hrtim, TIMB, leg2_upper_switch_convention, Lft_aligned); // Set the convention for leg 2
+ hrtim_cmpl_pwm_out1(hrtim, leg1_tu, leg1_upper_switch_convention, Lft_aligned); // Set the convention for leg 1
+ hrtim_cmpl_pwm_out1(hrtim, leg2_tu, leg2_upper_switch_convention, Lft_aligned); // Set the convention for leg 2
return period;
}
@@ -195,27 +195,27 @@ void hrtim_update_dead_time(hrtim_t hrtim, hrtim_tu_t tu, uint16_t rise_ns, uint
}
-uint16_t hrtim_init_updwn(hrtim_t hrtim, uint32_t *freq, uint16_t dt, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention)
+uint16_t hrtim_init_updwn(hrtim_t hrtim, uint32_t *freq, uint16_t dt, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
/* Master timer and timing unit frequency initialization */
uint16_t period = hrtim_init_master(hrtim, freq);
uint32_t freq_tu = (*freq)*2;
- /* Timer A initialization for leg 1 */
- hrtim_init_tu(hrtim, TIMA, &freq_tu, UpDwn);
- hrtim_pwm_dt(hrtim, TIMA, dt, dt); // Set the dead time. Note: this must be done before enable counter
- hrtim_cnt_en(hrtim, TIMA); // Enable counter
- hrtim_rst_evt_en(hrtim, TIMA, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer A with the master timer, with a reset on period event
+ /* Timer initialization for leg 1 */
+ hrtim_init_tu(hrtim, leg1_tu, &freq_tu, UpDwn);
+ hrtim_pwm_dt(hrtim, leg1_tu, dt, dt); // Set the dead time. Note: this must be done before enable counter
+ hrtim_cnt_en(hrtim, leg1_tu); // Enable counter
+ hrtim_rst_evt_en(hrtim, leg1_tu, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer A with the master timer, with a reset on period event
- /* Timer B initialization for leg 2 */
- hrtim_init_tu(hrtim, TIMB, &freq_tu, UpDwn);
- hrtim_pwm_dt(hrtim, TIMB, dt, dt); // Set the dead time. Note: this must be done before enable counter
- hrtim_cnt_en(hrtim, TIMB); // Enable the counter
- hrtim_rst_evt_en(hrtim, TIMB, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer B with the master timer, with a reset on period event
+ /* Timer initialization for leg 2 */
+ hrtim_init_tu(hrtim, leg2_tu, &freq_tu, UpDwn);
+ hrtim_pwm_dt(hrtim, leg2_tu, dt, dt); // Set the dead time. Note: this must be done before enable counter
+ hrtim_cnt_en(hrtim, leg2_tu); // Enable the counter
+ hrtim_rst_evt_en(hrtim, leg2_tu, LL_HRTIM_RESETTRIG_MASTER_PER); // We synchronize the Timer B with the master timer, with a reset on period event
- hrtim_cmpl_pwm_out1(hrtim, TIMA, leg1_upper_switch_convention, UpDwn); // Set the convention for leg 1
- hrtim_cmpl_pwm_out1(hrtim, TIMB, leg2_upper_switch_convention, UpDwn); // Set the convention for leg 2
+ hrtim_cmpl_pwm_out1(hrtim, leg1_tu, leg1_upper_switch_convention, UpDwn); // Set the convention for leg 1
+ hrtim_cmpl_pwm_out1(hrtim, leg2_tu, leg2_upper_switch_convention, UpDwn); // Set the convention for leg 2
return period/2; // return timing unit period which is half the period of the master timer
}
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
index f0977ac86090bb1b9d376558bab0d294568b3ade..e7be243948e6ae4e14613620796eba694592bfec 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
@@ -128,10 +128,12 @@ typedef enum {
* @param[in] leg2_upper_switch_convention Choice of the switch convention for leg 2, can be one of the following values:
* @arg @ref True (Buck mode)
* @arg @ref False (Boost mode)
+ * @param[in] leg1_tu Timer for leg 1
+ * @param[in] leg2_tu Timer for leg 2
* @return actual HRTIM resolution on success
* @return 0 on error
*/
-uint16_t hrtim_init(hrtim_t dev, uint32_t *freq, uint16_t dead_time_ns, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention);
+uint16_t hrtim_init(hrtim_t dev, uint32_t *freq, uint16_t dead_time_ns, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
/**
* @brief Initialize an HRTIM device and all these timing units for
@@ -146,10 +148,12 @@ uint16_t hrtim_init(hrtim_t dev, uint32_t *freq, uint16_t dead_time_ns, uint8_t
* @param[in] leg2_upper_switch_convention Choice of the switch convention for leg 2, can be one of the following values:
* @arg @ref True (Buck mode)
* @arg @ref False (Boost mode)
+ * @param[in] leg1_tu Timer for leg 1
+ * @param[in] leg2_tu Timer for leg 2
* @return actual HRTIM resolution on success
* @return 0 on error
*/
-uint16_t hrtim_init_updwn(hrtim_t dev, uint32_t *freq, uint16_t dt, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention);
+uint16_t hrtim_init_updwn(hrtim_t dev, uint32_t *freq, uint16_t dt, uint8_t leg1_upper_switch_convention, uint8_t leg2_upper_switch_convention,hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu);
/**
* @brief Updates the duty cycle
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
index 7a11474a2cdfa35dfa30ce82179d5583b42b8e7d..3292a0c25023c8cc88973542e44e174c183119bc 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
@@ -71,7 +71,7 @@ static uint8_t _TU_num(hrtim_tu_t tu){
* on the power converter to a frequency of 200kHz
* Must be initialized in first position
*/
-uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention)
+uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
uint32_t freq = LEG_FREQ;
@@ -81,7 +81,7 @@ uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_conv
leg_conf[_TU_num(leg_config[i].timing_unit)] = leg_config[i];
}
- period = hrtim_init(0, &freq, LEG_DEFAULT_DT,leg1_upper_switch_convention,leg2_upper_switch_convention);
+ period = hrtim_init(0, &freq, LEG_DEFAULT_DT,leg1_upper_switch_convention,leg2_upper_switch_convention, leg1_tu, leg2_tu);
dead_time = (period*LEG_DEFAULT_DT*leg_get_freq())/1000000;
min_pw = (period * 0.1) + dead_time;
max_pw = (period * 0.9) + dead_time;
@@ -95,7 +95,7 @@ uint16_t leg_init(bool leg1_upper_switch_convention, bool leg2_upper_switch_conv
* with the counter on up-down mode (center-alligned)
* Must be initialized in first position
*/
-uint16_t leg_init_center_aligned(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention)
+uint16_t leg_init_center_aligned(bool leg1_upper_switch_convention, bool leg2_upper_switch_convention,hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
uint32_t freq = LEG_FREQ;
@@ -105,7 +105,7 @@ uint16_t leg_init_center_aligned(bool leg1_upper_switch_convention, bool leg2_up
leg_conf[_TU_num(leg_config[i].timing_unit)] = leg_config[i];
}
- period = hrtim_init_updwn(0, &freq, LEG_DEFAULT_DT,leg1_upper_switch_convention,leg2_upper_switch_convention);
+ period = hrtim_init_updwn(0, &freq, LEG_DEFAULT_DT,leg1_upper_switch_convention,leg2_upper_switch_convention, leg1_tu, leg2_tu);
dead_time = (period*LEG_DEFAULT_DT*leg_get_freq())/1000000;
min_pw = (period * 0.1) + dead_time;
max_pw = (period * 0.9) + dead_time;