From b23939707af5152d4296c22537053eebae89eb96 Mon Sep 17 00:00:00 2001
From: Emmanuel Roux-Palomo <erouxpalom@laas.fr>
Date: Fri, 23 Jun 2023 05:25:19 +0000
Subject: [PATCH] Fix ADC Trigger interleaved and ADC Center Aligned
Fix ADC Trigger by using TIMCMP and CMP4 for ADC Update.
Fix get_leg_period_us for center aligned mode.
---
.../zephyr/src/hrtim_common.c | 16 ++++++++--------
.../src/voltage_mode/owntech_leg_driver.cpp | 5 ++++-
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
index 9c0e99f..404bc5b 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
@@ -62,16 +62,16 @@ void _hrtim_init_events_center_aligned(hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_B, LL_HRTIM_ROLLOVER_MODE_PER);
// setting adc trigger
- hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMAPER);
- hrtim_adc_trigger_en(3, 2, LL_HRTIM_ADCTRIG_SRC13_TIMBPER);
+ hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMACMP4);
+ hrtim_adc_trigger_en(3, 2, LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4);
}else if(leg1_tu == TIMA && leg2_tu == TIMC){
// setting the adc roll-over mode on period event
LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_A, LL_HRTIM_ROLLOVER_MODE_PER);
LL_HRTIM_TIM_SetADCRollOverMode(HRTIM1, LL_HRTIM_TIMER_C, LL_HRTIM_ROLLOVER_MODE_PER);
// setting adc trigger
- hrtim_adc_trigger_en(3, 1, LL_HRTIM_ADCTRIG_SRC13_TIMAPER);
- hrtim_adc_trigger_en(1, 3, LL_HRTIM_ADCTRIG_SRC13_TIMCPER);
+ hrtim_adc_trigger_en(3, 1, LL_HRTIM_ADCTRIG_SRC13_TIMACMP4);
+ hrtim_adc_trigger_en(1, 3, LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4);
}
}
@@ -87,11 +87,11 @@ void _hrtim_callback()
void hrtim_update_adc_trig_interleaved(uint16_t new_trig, hrtim_tu_t leg1_tu, hrtim_tu_t leg2_tu)
{
if(leg1_tu == TIMA && leg2_tu == TIMB){
- hrtim_cmp_set(0, TIMA, CMP3xR, new_trig);
- hrtim_cmp_set(0, TIMB, CMP3xR, new_trig);
+ hrtim_cmp_set(0, TIMA, CMP4xR, new_trig);
+ hrtim_cmp_set(0, TIMB, CMP4xR, new_trig);
}else if(leg1_tu == TIMA && leg2_tu == TIMC){
- hrtim_cmp_set(0, TIMA, CMP3xR, new_trig);
- hrtim_cmp_set(0, TIMC, CMP3xR, new_trig);
+ hrtim_cmp_set(0, TIMA, CMP4xR, new_trig);
+ hrtim_cmp_set(0, TIMC, CMP4xR, new_trig);
}
}
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
index bd61df1..46bf7e1 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/owntech_leg_driver.cpp
@@ -196,7 +196,10 @@ uint16_t leg_period(void)
uint32_t leg_get_period_us()
{
- return period*184e-6;
+ if(LL_HRTIM_TIM_GetCountingMode(HRTIM1, LL_HRTIM_TIMER_A) == LL_HRTIM_COUNTING_MODE_UP_DOWN)
+ return period*2*184e-6;
+ else
+ return period*184e-6;
}
uint8_t leg_numof(void)
--
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