From 71ec65ccabe66f2dabf0fceb2fb51eee8c6b673f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20Foucher?= <cfoucher@laas.fr>
Date: Tue, 29 Mar 2022 14:13:10 +0200
Subject: [PATCH] Add capability for finer configuration of HRTIM ADC event
generation; Separate event generation postscaler.
---
.../zephyr/src/hrtim_common.c | 7 ++-
.../src/voltage_mode/hrtim_voltage_mode.c | 55 ++++++++++++++++---
.../src/voltage_mode/hrtim_voltage_mode.h | 21 +++++--
3 files changed, 69 insertions(+), 14 deletions(-)
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
index 8629b66..f3c9281 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/hrtim_common.c
@@ -18,10 +18,14 @@
*/
/**
+ * @date 2022
+ *
* @author Clément Foucher <clement.foucher@laas.fr>
* @author Luiz Villa <luiz.villa@laas.fr>
*/
+#include <stm32_ll_hrtim.h>
+
#include "voltage_mode/hrtim_voltage_mode.h"
#include "current_mode/hrtim_current_mode.h"
#include "leg.h"
@@ -29,7 +33,8 @@
void _hrtim_init_events()
{
- hrtim_adc_trigger_en(0, ADC1R, AD13_TAC3);
+ hrtim_adc_trigger_set_postscaler(0, 9);
+ hrtim_adc_trigger_en(1, 1, LL_HRTIM_ADCTRIG_SRC13_TIMACMP3);
hrtim_cmp_set(0, TIMA, CMP3xR, 1);
}
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
index e59163c..b3b7b0b 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.c
@@ -18,6 +18,8 @@
*/
/**
+ * @date 2022
+ *
* @ingroup cpu_stm32
* @ingroup drivers_periph_hrtim
@@ -31,6 +33,7 @@
*/
#include <stm32_ll_rcc.h>
+#include <stm32_ll_hrtim.h>
#include "hrtim_voltage_mode.h"
#include "assert.h"
@@ -524,16 +527,50 @@ void hrtim_pwm_dt(hrtim_t hrtim, hrtim_tu_t tu, uint16_t ns)
* set) or if its outputs are enabled and set/reset by another timer. */
}
-void hrtim_adc_trigger_en(hrtim_t hrtim, hrtim_adc_t adc, hrtim_adc_trigger_t evt)
+void hrtim_adc_trigger_set_postscaler(hrtim_t hrtim, uint32_t ps_ratio)
{
- dev(hrtim)->sCommonRegs.CR1 |= HRTIM_CR1_ADC1USRC_0; // ADC trigger 1 update source
- dev(hrtim)->sCommonRegs.ADCPS1 |= 9;
- switch (adc) {
- case ADC1R: dev(hrtim)->sCommonRegs.ADC1R |= evt; break;
- case ADC2R: dev(hrtim)->sCommonRegs.ADC2R |= evt; break;
- case ADC3R: dev(hrtim)->sCommonRegs.ADC3R |= evt; break;
- case ADC4R: dev(hrtim)->sCommonRegs.ADC4R |= evt; break;
- }
+ dev(hrtim)->sCommonRegs.ADCPS1 |= ps_ratio;
+}
+
+void hrtim_adc_trigger_en(uint32_t event_number, uint32_t source_timer, uint32_t event)
+{
+ uint32_t adcTrig = LL_HRTIM_ADCTRIG_1;
+ uint32_t update = LL_HRTIM_ADCTRIG_UPDATE_MASTER;
+
+ switch (event_number)
+ {
+ case 1:
+ adcTrig = LL_HRTIM_ADCTRIG_1;
+ break;
+ case 2:
+ adcTrig = LL_HRTIM_ADCTRIG_2;
+ break;
+ case 3:
+ adcTrig = LL_HRTIM_ADCTRIG_3;
+ break;
+ case 4:
+ adcTrig = LL_HRTIM_ADCTRIG_4;
+ break;
+ }
+
+ switch (source_timer)
+ {
+ case 1:
+ update = LL_HRTIM_ADCTRIG_UPDATE_TIMER_A;
+ break;
+ case 2:
+ update = LL_HRTIM_ADCTRIG_UPDATE_TIMER_B;
+ break;
+ case 3:
+ update = LL_HRTIM_ADCTRIG_UPDATE_TIMER_C;
+ break;
+ case 4:
+ update = LL_HRTIM_ADCTRIG_UPDATE_TIMER_D;
+ break;
+ }
+
+ LL_HRTIM_SetADCTrigSrc(HRTIM1, adcTrig, event);
+ LL_HRTIM_SetADCTrigUpdate(HRTIM1, adcTrig, update);
}
void hrtim_adc_trigger_dis(hrtim_t hrtim, hrtim_adc_t adc, hrtim_adc_trigger_t evt)
diff --git a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
index 4de4e49..cc3d861 100644
--- a/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
+++ b/zephyr/modules/owntech_hrtim_driver/zephyr/src/voltage_mode/hrtim_voltage_mode.h
@@ -18,6 +18,8 @@
*/
/**
+ * @date 2022
+ *
* @defgroup drivers_periph_hrtim OwnTech's hrtim module
* @ingroup drivers_periph
* @brief Low-level HRTIM peripheral driver
@@ -522,13 +524,24 @@ void hrtim_out_dis(hrtim_t dev, hrtim_tu_t tu, hrtim_out_t out);
void hrtim_pwm_dt(hrtim_t dev, hrtim_tu_t tu, uint16_t ns);
/**
- * @brief Enable an ADCx trigger event
+ * @brief Set the HRTIM event postsaler. Postscaler ratio indicates
+ * how many potential events will be ignored between two
+ * events which are effectively generated.
*
* @param[in] dev HRTIM device
- * @param[in] adc ADC trigger register from ADC1R to ADC4R
- * @param[in] evt Trigger event
+ * @param[in] ps_ratio Post scaler ratio (0 = no post scaler, default)
+ */
+void hrtim_adc_trigger_set_postscaler(hrtim_t dev, uint32_t ps_ratio);
+
+/**
+ * @brief Configures and enables an ADC trigger event.
+ *
+ * @param[in] event_number Number of the event to configure
+ * @param[in] source_timer Source timer of the event. 0 = Master timer, 1 = Timer A, 2 = Timer B, etc.
+ * @param[in] event Event as defined in stm32g4xx_ll_hrtim.h 'ADC TRIGGER X/X SOURCE'
*/
-void hrtim_adc_trigger_en(hrtim_t dev, hrtim_adc_t adc, hrtim_adc_trigger_t evt);
+void hrtim_adc_trigger_en(uint32_t event_number, uint32_t source_timer, uint32_t event);
+
/**
* @brief Disbable a ADCx trigger event
--
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