Commit fa005f4d authored by Clément Foucher's avatar Clément Foucher
Browse files

Initial set-up: include Zephyr OS on PlatformIO and configure it to use board Nucleo G474RE.

parent 327633d3
.pio
.vscode
\ No newline at end of file
This is the OwnTech Power API Core repository.
The OwnTech Power API is modular, allowing to automatically select libraries for use with the power converter.
Using the Core repository, you can work with OwnTech Power API Libraries, which are automatically downloaded on demand.
The Power API is designed to be used with VS Code and PlatformIO.
[More information about PlatformIO on VS code](https://platformio.org/install/ide?install=vscode).
# Downloading OwnTech Power API Core
You fisrt need to clone the Core repository using the following command:
`git clone https://gitlab.laas.fr/owntech/power-api/core.git owntech_power_api`
Then, open VS Code and, if not already done, install the PlatformIO plugin.
Finall, open the newly cloned folder `owntech_power_api` using menu `File > Open Folder...`
# Working with OwnTech Power API
The hierarchy of the project is as follows:
```
owntech_power_api
└─ boards
| └─ nucleo_g474re.json
└─ src
| └─ main.cpp
| └─ owntech.ini
└─ zephyr
| └─ dts
| └─ modules
| └─ [...]
└─ LICENSE
└─ [...]
```
You will want to work in the `src` folder, other folders and files are used to configure the underlying Zephyr OS.
Power users may want to tweak them too. Is so, please checkout the [Zephyr documentation](https://docs.zephyrproject.org/latest/).
In the `src` folder, the file `main.cpp` is the entry point of the application.
The file `owntech.ini` is used to configure the Power API Libraries you want to use.
# Working with OwnTech Power API Libraries
To enable a Power API Library, edit the `src/owntech.ini` file.
In this file, you'll find various commented libraries references.
Simply uncomment a line to enable the corresponding library.
{
"build": {
"core": "stm32",
"cpu": "cortex-m4",
"extra_flags": "-DSTM32G4xx -DSTM32G474xx",
"f_cpu": "170000000L",
"mcu": "stm32g474ret6",
"product_line": "STM32G474xx",
"variant": "NUCLEO_G474RE"
},
"connectivity": [
"can"
],
"debug": {
"jlink_device": "STM32G474RE",
"openocd_target": "stm32g4x",
"svd_path": "STM32G474xx.svd"
},
"frameworks": [
"arduino",
"cmsis",
"mbed",
"libopencm3",
"stm32cube",
"zephyr"
],
"name": "Nucleo G474RE",
"upload": {
"maximum_ram_size": 131072,
"maximum_size": 524288,
"protocol": "mbed",
"protocols": [
"jlink",
"stlink",
"cmsis-dap",
"blackmagic",
"mbed"
]
},
"url": "https://www.st.com/en/evaluation-tools/nucleo-g474re.html",
"vendor": "ST"
}
#
# Project Configuration File
#
# A detailed documentation with the EXAMPLES is located here:
# https://docs.platformio.org/en/latest/projectconf/index.html
#
[platformio]
default_envs = owntech_power_converter
extra_configs = src/owntech.ini
#### COMMON ENVIRONMENT DEFINITIONS ###########################################
[env]
framework = zephyr
platform = ststm32
# Serial monitor baud rate
monitor_speed = 115200
# Compiler settings
build_flags =
-std=gnu++17
-fsingle-precision-constant
-Wl,-Map,memory.map
# Below flags are only valid for C++ and create warnings for C files, so we add them as
# CXXFLAGS in extra_script.
build_unflags = -Wno-register -fno-rtti
extra_scripts = zephyr/platformio-extra.py
#### BOARD-SPECIFIC DEFINITIONS ###############################################
[env:owntech_power_converter]
board = nucleo_g474re
# Supported upload protocols: mbed, stlink, jlink
upload_protocol = stlink
#debug_tool = jlink
/*
* Copyright (c) 2021 LAAS-CNRS
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 2.1 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
* SPDX-License-Identifier: LGLPV2.1
*/
/**
* @brief This file it the main entry point of the
* OwnTech Power API. Please check the README.md
* file at the root of this project for basic
* information on how to use the Power API,
* or refer the the wiki for detailed information.
* Wiki: https://gitlab.laas.fr/owntech/power-api/core/-/wikis/home
*
* @author Clément Foucher <clement.foucher@laas.fr>
*/
void main(void)
{
}
#
# OwnTech Power API Library configuration file
#
# To enable a library, simply uncomment the corresponding line.
#
[env]
lib_deps=
# quick_start=https://gitlab.laas.fr/owntech/power-api/opalib-quick-start.git
cmake_minimum_required(VERSION 3.13.1)
find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
project(owntech_power_api)
target_sources(app PRIVATE ../src/main.cpp)
zephyr_include_directories(../src)
/ {
mychannels: adc-inputs {
compatible = "adc-inputs";
v1-low {
io-channels = <&adc2 1>;
differential;
label = "V1_LOW";
};
i1-low {
io-channels = <&adc1 6>;
label = "I1_LOW";
};
v2-low {
io-channels = <&adc2 3>;
differential;
label = "V2_LOW";
};
i2-low {
io-channels = <&adc1 7>;
label = "I2_LOW";
};
v-high {
io-channels = <&adc2 11>;
differential;
label = "V_HIGH";
};
i-high {
io-channels = <&adc1 8>;
label = "I_HIGH";
};
};
};
# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2020 Martin Jäger / Libre Solar
description: Description for an ADC input including gain (multiplier/divider) and offset
compatible: "adc-inputs"
child-binding:
description: ADC inputs child node
properties:
io-channels:
type: phandle-array
required: true
description: |
ADC channel for this input.
differential:
type: boolean
required: false
description: |
Set the io-channels to differential mode. Default is Single Ended
enable-gpios:
type: phandle-array
required: false
description: |
Enable the voltage divider input or amplifier.
If present the corresponding GPIO must be set to an active level
to enable the divider input.
label:
required: true
type: string
description: Human-readable string describing the channel acquirred data
description: HRTIM outputs
compatible: "hrtim"
include: base.yaml
properties:
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for HRTIM outputs. We expect that the
phandles will reference pinctrl nodes, e.g.
pinctrl-0 = <&hrtim1_cha1_pa8 &hrtim1_cha2_pa9>;
description: GPIO parent node
compatible: "ngnd-gpio"
child-binding:
description: NGND GPIO child node
properties:
gpios:
type: phandle-array
required: true
label:
required: true
type: string
description: Human readable string describing the device (used as device_get_binding() argument)
/ {
soc {
hrtim1: timers@40016800 {
compatible = "st,stm32-timers";
reg = <0x40016800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x04000000>;
interrupts = <67 0>, <68 0>, <69 0>, <70 0>,
<71 0>, <72 0>, <73 0>, <74 0>;
interrupt-names = "master", "tima", "timb", "timc",
"timd", "time", "flt", "timf";
status = "okay";
label = "HRTIM_1";
outputs {
compatible = "hrtim";
pinctrl-0 = <&hrtim1_cha1_pa8 &hrtim1_cha2_pa9
&hrtim1_chb1_pa10 &hrtim1_chb2_pa11
&hrtim1_chc1_pb12 &hrtim1_chc2_pb13
&hrtim1_chd1_pb14 &hrtim1_chd2_pb15
&hrtim1_che1_pc8 &hrtim1_che2_pc9
&hrtim1_chf1_pc6 &hrtim1_chf2_pc7>;
};
};
pinctrl: pin-controller@48000000 {
hrtim1_cha1_pa8: hrtim1_cha1_pa8 {
pinmux = <STM32_PINMUX('A', 8, AF13)>;
};
hrtim1_cha2_pa9: hrtim1_cha2_pa9 {
pinmux = <STM32_PINMUX('A', 9, AF13)>;
};
hrtim1_chb1_pa10: hrtim1_chb1_pa10 {
pinmux = <STM32_PINMUX('A', 10, AF13)>;
};
hrtim1_chb2_pa11: hrtim1_chb2_pa11 {
pinmux = <STM32_PINMUX('A', 11, AF13)>;
};
hrtim1_chc1_pb12: hrtim1_chc1_pb12 {
pinmux = <STM32_PINMUX('B', 12, AF13)>;
};
hrtim1_chc2_pb13: hrtim1_chc2_pb13 {
pinmux = <STM32_PINMUX('B', 13, AF13)>;
};
hrtim1_chd1_pb14: hrtim1_chd1_pb14 {
pinmux = <STM32_PINMUX('B', 14, AF13)>;
};
hrtim1_chd2_pb15: hrtim1_chd2_pb15 {
pinmux = <STM32_PINMUX('B', 15, AF13)>;
};
hrtim1_che1_pc8: hrtim1_che1_pc8 {
pinmux = <STM32_PINMUX('C', 8, AF3)>;
};
hrtim1_che2_pc9: hrtim1_che2_pc9 {
pinmux = <STM32_PINMUX('C', 9, AF3)>;
};
hrtim1_chf1_pc6: hrtim1_chf1_pc6 {
pinmux = <STM32_PINMUX('C', 6, AF13)>;
};
hrtim1_chf2_pc7: hrtim1_chf2_pc7 {
pinmux = <STM32_PINMUX('C', 7, AF13)>;
};
};
};
};
/ {
ngnd-gpio {
compatible = "ngnd-gpio";
neutral_gnd: n_gnd {
gpios = <&gpiob 11 GPIO_ACTIVE_HIGH>;
label = "Neutral to GND shunt";
};
};
aliases {
ngnd = &neutral_gnd;
};
};
\ No newline at end of file
source [find interface/stlink.cfg]
source [find target/stm32g4x.cfg]
# If you have several stlink connected simultaneously you can choose
# which one to use with hla_serial.
#
# Example :
# ls -l /dev/serial/by-id/
# total 0
# lrwxrwxrwx 1 root root 13 févr. 10 11:54 usb-STMicroelectronics_ST-LINK_V3_002500443038510C34333935-if02 -> ../../ttyACM0
#
# Here serial is 002500443038510C34333935
#
#hla_serial "002500443038510C34333935"
reset_config srst_only
init
targets
reset halt
flash write_image erase "build/zephyr/zephyr.elf" 0
reset run
shutdown
#include "dts/hrtim.dtsi"
#include "dts/adc-channels.dtsi"
#include "dts/ngnd.dtsi"
/*******/
/* ADC */
/*******/
&adc1 {
pinctrl-0 = <&adc1_in6_pc0 &adc1_in7_pc1 &adc1_in8_pc2 &adc1_in9_pc3>;
status = "okay";
};
&adc2 {
pinctrl-0 = <&adc2_in1_pa0 &adc2_in2_pa1 &adc2_in3_pa6 &adc2_in4_pa7 &adc2_in11_pc5 &adc2_in12_pb2>;
status = "okay";
};
/*******/
/* SPI */
/*******/
/* &spi1_miso_pa6 &spi1_mosi_pa7 conflict with &adc2_in3_pa6 &adc2_in4_pa7 */
&spi1 {
status = "disabled";
};
/* &spi2_nss_pb12 conflict with $fdcan2_rx_pb12, &spi2_nss_pc6 AF does not exist */
&spi2 {
/* pinctrl-0 = <&spi2_nss_pc6 &spi2_sck_pb13
* &spi2_miso_pb14 &spi2_mosi_pb15>; */
status = "disabled";
};
/* &spi3_nss_pa15 &spi3_miso_pc11 &spi3_mosi_pc12 conflict with hrtim */
&spi3 {
pinctrl-0 = <&spi3_nss_pa4 &spi3_sck_pc10 &spi3_miso_pb4 &spi3_mosi_pb5>;
status = "okay";
};
/*******/
/* I2C */
/*******/
/* &i2c1_scl_pb8 &i2c1_sda_pb9 will conflict with can1 */
&i2c1 {
status = "disabled";
};
/********/
/* UART */
/********/
/* &usart1_rx_pc5 conflict with &adc2_in11_pc5 */
&usart1 {
pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pb7>;
status = "okay";
};
/*********/
/* Timer */
/*********/
&timers6 {
status = "okay";
};
/*******/
/* DMA */
/*******/
&dma1 {
status = "okay";
};
&dma2 {
status = "okay";
};
&dmamux1 {
status = "okay";
};
# Custom settings, as referred to as "extra_script" in platformio.ini
#
# See https://docs.platformio.org/en/latest/projectconf/section_env_advanced.html#extra-scriptss
Import("env")
env.Append( CXXFLAGS=[ "-Wno-register -fno-rtti" ] )
# Main application configuration (overrides board-specific settings)
# only very small heap necessary for malloc in printf statements with %f
CONFIG_HEAP_MEM_POOL_SIZE=256
CONFIG_CPLUSPLUS=y
CONFIG_NEWLIB_LIBC=y
CONFIG_NEWLIB_LIBC_FLOAT_PRINTF=y
CONFIG_CMSIS_DSP=y
CONFIG_CMSIS_DSP_CONTROLLER=y
CONFIG_FPU=y
CONFIG_BUILD_OUTPUT_BIN=y
CONFIG_WATCHDOG=y
CONFIG_WDT_DISABLE_AT_BOOT=y
CONFIG_THREAD_NAME=y
CONFIG_REBOOT=y
CONFIG_HWINFO=y
# Buses
CONFIG_GPIO=y
CONFIG_SERIAL=y
CONFIG_I2C=y
# Console
CONFIG_CONSOLE_SUBSYS=y
CONFIG_CONSOLE_GETCHAR=y
CONFIG_STDOUT_CONSOLE=y
# Use minimal log by default to save memory for STM32F0 with little RAM
CONFIG_LOG=y
#CONFIG_LOG_MINIMAL=y
# Enable assertions for debug purpose
CONFIG_ASSERT=y
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment